Are you ready to design the future and leave your mark on cutting edge mixed signal IC development? At Infineon Austria, we''re looking for a Design Application Engineer who can bridge the gap between chip designers and design environments. If you thrive on enabling innovation, optimizing workflows, and turning complex challenges into seamless solutions, this is your chance to join a team that powers tomorrow''s technology today. As a key player in our R&D mixed signal IC design team, you''ll support chip designers by ensuring smooth and efficient development workflows. You''ll provide first level support for EDA tools, proactively optimize methodologies, and implement quick fixes to keep projects on track. Collaborating closely with internal teams, you''ll drive improvements, roll out new design solutions, and contribute to a global community of experts. In your new role you will: Work in the R&D mixed signal IC design organization Support R&D chip designers for daily issues related to mixed signal IC development flow and related EDA software tools and methodology (1stlevel support) Proactively consult chip design projects to ensure proper and efficient usage of working environment, software tools and related methodology Collect application specific requirements to the design environment and provide fast solutions (e.g. hot fixes) where needed Trigger and track implementation of enhancements of the design environment to ensure on time availability for productive usage Work closely with internal software tool and methodology providers on improving and developing new solutions Promote new methodology solutions and support the roll out of these in design projects Share knowledge within the (IFX world wide) "Design Application Engineering Community You are best equipped if you have: A university Master degree in Electrical Engineering, Computer Science or equivalent At least 5+ years of experience in mixed signal IC design/layout/verification or support Programming skills : Python, Perl, Tcl, SKILL (Cadence) Knowledge of design languages : System Verilog and or VHDL Strong experience with Unix/Linux and Compute Farm environment (e.g.Load Sharing Facility/LSF) Experience with mixed signal EDA tools like Cadence (Virtuoso, Spectre,Xcelium, AMS Designer, Genus, Innovus), Synopsys (DC, ICC) and Siemens/Mentor (Calibre, Solido) Know how in full custom layout design techniques will be an added advantage Strong team playing and customer orientation skills Good English skills with German as a strong plus We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group H (). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills. Contact: Mag. Stefanie Triebelnig, BA, LinkedIn for driving decarbonization