Support R&D chip designers in the mixed-signal IP design organization by providing 1st level support for EDA tools and methodologies.About this roleYou will work in the R&D mixed-signal IP design organization, supporting R&D chip designers with daily issues related to mixed-signal IP development flow and related EDA software tools and methodology (1st level support).Your responsibilitiesWork in the R&D mixed-signal IP design organizationSupport R&D chip designers for daily issues related to mixed-signal IP development flow and related EDA software tools and methodology (1st level support)Proactively consult chip design projects to ensure proper and efficient usage of working environment, software tools and related methodologyCollect application specific requirements to the design environment and provide fast solutions (e.g. hot fixes) where neededTrigger and track implementation of enhancements of the design environment to ensure on-time availability for productive usageWork closely with internal software tool and methodology providers on improving and developing new solutionsPromote new methodology solutions and support the roll-out of these in design projectsShare knowledge within the (IFX world-wide)