Design Verification Engineer for Cellular SoC (m/f/d)Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Hard-working people and inspiring, innovative technologies are the norms here. Enter a multifunctional role as a Design Verification Engineer in our team in Linz, Austria. We are at the center of the IP and full-chip verification effort within a silicon design group responsible for verifying the state-of-the-art Cellular RF SoCs. This position requires someone comfortable to dive into HW design and verification engineering.DescriptionYou will need a fundamental understanding of HW and SW design as well as the eagerness to do hands-on verification. The cool thing is, once you crack the design verification world, it will potentiate your knowledge of HW/SW systems in the RF world. We will introduce you to assertion-based verification, simulation acceleration, and formal methods. You will learn special verification languages such as universal verification methodology (UVM) or formal description languages, like SVA flanked by AI-based approaches. Our team is a very strong cellular hardware design verification team with very good individual communication. You will work in a strong team setup with a lot of interpersonal interaction that will help you to get a very wide understanding of our work as well as the sub-system and system integration into RF modems. You will build metric-driven verification plans from specifications, review them, and refine them to achieve coverage targets. You will define functional verification requirements based on design requirements and architecture and develop UVM-based highly reusable test benches starting from different components over cluster into SoC levels.Minimum QualificationsProven experience in taping out SoC systems with embedded processor cores and hands-on verification experience in UVM environments.Strong collaborative work experience with system, design, and firmware teams.Verification and Validation approach as well as outstanding sense and commitment to quality of deliverables.A detective skill for finding bugs and weaknesses.Having a good view of the definition and design process of a chip, holistically thinking beyond the design verification domain boundaries.Good interpersonal and communication skills.English language proficiency is required for this position.Preferred QualificationsBachelor or Master or higher degree in Electrical Engineering or Communication Engineering with extensive years of working experience or PhD in a relevant field with proven years of working experience.System know-how in the cellular RF transceiver domain is a plus.Knowledge of assertion-based verification would be nice to have.Knowledge of power-aware verification would be a plus.Ideally, you worked on: system/IP definition, system/IP validation, system/IP design, system/IP testing, or similar.
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