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Master Thesis: Application of generative AI technology for SystemVerilog code generation (f/m/div), Villach
Client:
Infineon Technologies
Location:
Villach
Job Category:
Other
EU work permit required:
Yes
Job Reference:
455c63e17189
Job Views:
6
Posted:
14.03.2025
Expiry Date:
28.04.2025
Job Description:
You love technology, a dynamic environment and want to be part of state-of-the-art developments? At Infineon's Design Center Villach (DCV) we connect the real with the digital world. We foster innovation and develop circuits that process digital and analog signals. Do you have an affinity for programming and AI and are close to finishing your studies in Computer Science, Electrical Engineering, or a related field? We are seeking a highly motivated and talented student to join our team for a master’s thesis project that focuses on generative AI for code generation in IC product development. As a key contributor to this project, you will have the opportunity to explore the potential of cutting-edge AI technology in the semiconductor industry, while also gaining valuable insights into the processes of IC product development. This could be YOUR chance! Join our team in Villach in the area of Functional Verification Engineering and boost your career.
Responsibilities:
1. Develop a generative AI model that can efficiently generate SystemVerilog code for IC product development
2. Contribute to optimizing our design and verification processes
3. Work closely with our cross-functional team of experts to design, train, and evaluate the performance of the AI model
4. Deploy and integrate the AI model into our existing development workflows, optimizing our design and verification processes
This hands-on experience will not only improve your skills in AI and machine learning, but you will also learn about the complexities of IC product development. The completion of a Master's thesis within the employment is possible and supported.
This thesis has to be written in cooperation with a university.
Requirements:
1. A solid understanding of programming concepts and familiarity with Python programming language
2. A basic understanding of IC digital design and verification and experience with SystemVerilog and UVM as a plus
3. Previous experience with AI, machine learning, AI agent frameworks (Langchain, CrewAI) and/or version control systems like GIT is a significant advantage
4. A self-motivated and curious working style with good communication skills and the ability to work independently
Application Documents:
Please attach the following documents (German or English) to your application:
1. Motivation letter
2. CV
3. Certificate of matriculation at a university
4. Latest Transcript of records (not older than 6 months)
5. Highest completed educational certificate (Bachelor certificate for Master students)
6. Reference letter (optional)
Benefits:
1. Coaching, mentoring networking possibilities
2. Wide range of training offers & planning of career development
3. International assignments
4. Different career paths: Project Management, Technical Ladder, Management & Individual Contributor
5. Flexible working conditions
6. Home office options
7. Part-time work possible (also during parental leave)
8. Sabbatical
9. Child care in Villach & Klagenfurt
10. On-site social counselling and works doctor
11. Health promotion programs
12. On-site canteen
13. Private insurance offers
14. Wage payment in case of sick leave
15. Corporate pension benefits
16. Flexible transition into retirement
17. Performance bonus
18. Accessibility, access for wheelchairs
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