Social network you want to login/join with:
Client:
microTECH Global Ltd
Location:
Austria
Job Category:
Other
EU work permit required:
Yes
Job Reference:
b3fa7c02ea03
Job Views:
1
Posted:
01.04.2025
Expiry Date:
16.05.2025
Job Description:
Job Title: Mixed-Signal Verification Engineer
Job Type: Permanent
About the client and position:
As one of the market leaders for turnkey solutions for their broad portfolio of customers, my client offers the possibility to work on many interesting and highly complex products for Automotive, Industrial, Medical, and many other markets. They offer a dynamic, exciting, and friendly environment, as well as many possibilities for your further development in the direction that suits you the best.
This is a fantastic opportunity to be a part of a close team and be a driver of developing your knowledge, skills, and experience.
Responsibilities:
1. Working on Verification of Analog and Mixed-Signal (AMS) products
2. Develop functional models for Analog and mixed-signals IPs/blocks and ensure their matching with schematics
3. Development of Analog/Mixed Mode Test-benches and verification of Analog/mixed-signals blocks and interactions between them
4. Work on the verification concept and specification for our mixed-signals projects
5. Align and track the implementation of test-benches and stimuli generation according to the verification plan
6. Run simulations, analyze results and conduct verification reviews to ensure that requirements are met
7. Shape the verification methodology in close cooperation with the application, concept, and design engineers. Innovate the methodology to reduce the verification cost while preserving quality
Requirements:
1. A Bachelor, Master, or PhD degree in Electronics Engineering or related subject.
2. Over 5 years of hands-on experience with analogue circuit layout in CMOS and Bi-CMOS technologies.
3. Be a team player with good interpersonal skills, and excellent communication skills, including verbal, written, and presentation skills in English.
4. Very good knowledge of Cadence tool workflow for schematic capture and layout XL.
5. Very good knowledge in running tools for checking DRC, LVS, ERC, and antenna rules and ability to effectively debug any errors
6. Very good knowledge of good layout matching techniques such as common centroid or dummy usage
7. Very good understanding of electromigration and how to layout a block with high reliability
8. Appreciation and knowledge of parasitics associated with a layout.
9. Knowledge of Cadence SKILL language and PCELL development.
If you are suited and interested, please send your updated CV and the best number to reach you on.
#J-18808-Ljbffr